INFOMATIC POWER SYSTEMS CORPORATION
486 EISA BABY SIZE
|
Processor |
80486SX/80487SX/80486DX/80486DX2 |
|
Processor Speed |
20/25/33/50/66(internal)MHz |
|
Chip Set |
OPTI |
|
Max. Onboard DRAM |
128MB |
|
Cache |
64/128/256/512KB |
|
BIOS |
AMI |
|
Dimensions |
330mm x 218mm |
|
I/O Options |
None |
|
NPU Options |
4167 |
|
CONNECTIONS | |||
|
Purpose |
Location |
Purpose |
Location |
|
Speaker |
J4 |
Turbo LED |
J7 |
|
Power LED & keylock |
J5 |
Reset switch |
S9 |
|
Turbo switch |
J6 | ||
|
USER CONFIGURABLE SETTINGS | |||
|
Function |
Jumper |
Position | |
|
External BCLK buffering 80486DX (33/50MHz) |
JP1 |
pins 1 & 2 closed | |
|
External BCLK buffering 80486SX/80487SX (20/25MHz) |
JP1 |
pins 2 & 3 closed | |
|
Cache bank select single (128/512KB) |
JP2 |
pins 1 & 2 closed | |
|
Cache bank select double (64/256KB) |
JP2 |
pins 2 & 3 closed | |
|
Snooping/Flush 20MHz CPU |
JP8 |
Closed | |
|
Snooping/Flush > 20MHz CPU |
JP8 |
Open | |
|
Monitor type select color |
JP9 |
Closed | |
|
Monitor type select monochrome |
JP9 |
Open | |
|
CPU clock mode select single frequency |
JP12 |
pins 1 & 2 closed | |
|
CPU clock mode select double frequency |
JP12 |
pins 2 & 3 closed | |
|
DRAM CONFIGURATION | ||
|
Size |
Bank 0 |
Bank 1 |
|
4MB |
(4) 1M x 9 |
NONE |
|
8MB |
(4) 1M x 9 |
(4) 1M x 9 |
|
16MB |
(4) 4M x 9 |
NONE |
|
20MB |
(4) 1M x 9 |
(4) 4M x 9 |
|
32MB |
(4) 4M x 9 |
(4) 4M x 9 |
|
64MB |
(4) 16M x 9 |
NONE |
|
128MB |
(4) 16M x 9 |
(4) 16M x 9 |
|
CACHE CONFIGURATION | ||
|
Size |
Bank 0 |
Bank 1 |
|
64KB |
(4) 8K x 8 |
(4) 8K x 8 |
|
128KB |
NONE |
(4) 32K x 8 |
|
256KB |
(4) 32K x 8 |
(4) 32K x 8 |
|
512KB |
NONE |
(4) 128K x 8 |
|
Note:In order to configure cache to 512KB, board needs to be specifically ordered. The difference will be that Bank 1 will be made up of 4 32-pin DIP sockets, instead of 4 28-pin DIP sockets. | ||
|
CACHE TAG CHIP CONFIGURATION | |||||
|
Size |
JP3 |
JP4 |
JP5 |
U55 |
U56 |
|
64KB |
Open |
Open |
Open |
(1) 8K x 8 |
N/A |
|
128KB |
Closed |
Open |
Open |
(1) 8K x 8 |
N/A |
|
256KB |
Closed |
Closed |
Open |
(1) 8K x 8 |
(1) 8K x 8 |
|
512KB |
Closed |
Closed |
Closed |
(1) 32K x 8 |
N/A |
|
CACHE DIRTY BIT CHIP CONFIGURATION | ||||
|
Size |
JP16 |
JP17 |
JP18 |
U72 & U54 |
|
64KB |
Open |
Open |
Open |
(2) 16K x 1 or (2) 64K x 1 |
|
128KB |
Closed |
Open |
Open |
(2) 16K x 1 or (2) 64K x 1 |
|
256KB |
Closed |
Closed |
Open |
(2) 16K x 1 or (2) 64K x 1 |
|
512KB |
Closed |
Closed |
Closed |
(2) 64K x 1 |
|
CPU TYPE CONFIGURATION | ||
|
Type |
JP10 |
JP11 |
|
80486SX |
pins 1 & 2 & 3 & 4 closed |
pins 2 & 3 closed |
|
80487SX |
pins 1 & 2 & 3 & 4 closed |
pins 1 & 2 closed |
|
80486DX |
pins 2 & 3 closed |
Open |
|
EBC SPEED CONFIGURATION | ||
|
Speed |
JP6 |
JP7 |
|
20MHz |
Open |
Open |
|
25MHz |
Open |
Open |
|
33MHz |
Open |
Closed |
|
40MHz |
Closed |
Open |
|
50MHz |
Closed |
Closed |