EVEREX SYSTEMS, INC.
STEP 386 REV. G
Processor |
80386DX |
Processor Speed |
16/20MHz |
Chip Set |
C & T |
Max. onboard DRAM |
8MB |
Cache |
64/128KB |
BIOS |
AMI |
Dimensions |
355mm x 304mm |
I/O Options |
32-bit external memory card |
NPU Options |
80387DX |
CONNECTIONS | |
Purpose |
Location |
32-bit external memory card |
S1 |
USER CONFIGURABLE SETTINGS | |||
Function |
Jumper/Switch |
Position | |
Factory configured - do not alter |
SW1 |
Unknown |
SYSTEM DRAM CONFIGURATION | |||||
Size |
Bank 0 |
Bank 1 |
Bank 2 |
Bank 3 |
W1 |
1MB |
(4) 256K x 9 |
NONE |
NONE |
NONE |
Closed |
2MB |
(4) 256K x 9 |
(4) 256K x 9 |
NONE |
NONE |
Closed |
4MB |
(4) 1M x 9 |
NONE |
NONE |
NONE |
Open |
4MB |
(4) 256K x 9 |
(4) 256K x 9 |
(4) 256K x 9 |
(4) 256K x 9 |
Closed |
8MB |
(4) 1M x 9 |
(4) 1M x 9 |
NONE |
NONE |
Open |
16MB |
(4) 1M x 9 |
(4) 1M x 9 |
(4) 1M x 9 |
(4) 1M x 9 |
Open |
Note:Banks 2 & 3, and W1 are located on the external memory Board. |
CACHE CONFIGURATION | ||||
Size |
Bank 0 |
Bank 1 |
TAG |
Dirty Bit (U38) |
64KB |
(4) 16K x 4 |
NONE |
(2) 16K x 4 |
(1) 16K x 4 |
128KB |
(4) 16K x 4 |
(4) 16K x 4 |
(2) 16K x 4 |
(1) 16K x 4 |
Note:Each Cache bank must be fully populated when its corresponding DRAM bank is populated. |
RESISTOR SIP CONFIGURATION | ||||
Memory Banks installed |
RP28 |
RP29 |
RP30 |
RP31 |
Bank 0 |
Installed |
Open |
Installed |
Open |
Bank 0 & 1 |
Open |
Installed |
Installed |
Open |
Banks 0, 1, 2, & 3 |
Open |
Installed |
Open |
Installed |
Note:Banks 2 & 3 are on the external memory card |
CACHE CONFIGURATION | ||
Size |
Cache |
Location |
64KB |
(8) 16K x 4 |
Bank 2 |
128KB |
(8) 16K x 4 |
Bank 2 & 3 |
Note:Each Cache bank must be fully populated when its corresponding DRAM bank is populated. |