DIGITAL EQUIPMENT CORPORATION
DECPC LPX+
|
Processor |
SL80486SX/SL80486DX/SL80486DX2/SL80486DX4/P24T |
|
Processor Speed |
25/33/40/50(internal)/50/66(internal)/100(internal)MHz |
|
Chip Set |
Unidentified |
|
Video Chip Set |
None |
|
Maximum Onboard Memory |
64MB |
|
Maximum Video Memory |
None |
|
Cache |
128/256KB |
|
BIOS |
Unidentified |
|
Dimensions |
254mm x 218mm |
|
I/O Options |
32-bit VESA local bus slots (2), floppy drive interface, IDE interface, parallel port, PS/2 mouse port, serial ports (2) |
|
NPU Options |
None |
|
CONNECTIONS | |||
|
Purpose |
Location |
Purpose |
Location |
|
Parallel port |
CN1 |
IDE interface |
CN5 |
|
Serial port |
CN2 |
Floppy drive interface |
CN6 |
|
Serial port |
CN3 |
32-bit VESA local bus slots |
SL1 & SL2 |
|
PS/2 mouse port |
CN4 | ||
|
USER CONFIGURABLE SETTINGS | |||
|
Function |
Label |
Position | |
|
|
Monitor type select monochrome |
J14 |
Open |
|
Monitor type select color |
J14 |
Closed | |
|
|
Password normal operation |
J15 |
Open |
|
Password clear |
J15 |
Closed | |
|
|
Reset switch enabled |
J24 |
Closed |
|
Reset switch disabled |
J24 |
Open | |
|
|
Factory configured do not alter |
J36 |
Closed |
|
|
VLRDY >CPURDY connects to CPU bus ready |
J44 |
Pins 1 & 2 closed |
|
VLRDY >LRDY synchronized through chipset |
J44 |
Pins 2 & 3 closed | |
|
DRAM CONFIGURATION | ||
|
Size |
Bank 0 |
Bank 1 |
|
4MB |
(2) 256K x 36 |
(2) 256K x 36 |
|
4MB |
(2) 512K x 36 |
None |
|
8MB |
(2) 1M x 36 |
None |
|
16MB |
(2) 2M x 36 |
None |
|
16MB |
(2) 1M x 36 |
(2) 1M x 36 |
|
24MB |
(2) 2M x 36 |
(2) 1M x 36 |
|
32MB |
(2) 4M x 36 |
None |
|
32MB |
(2) 2M x 36 |
(2) 2M x 36 |
|
40MB |
(2) 4M x 36 |
(2) 1M x 36 |
|
48MB |
(2) 4M x 36 |
(2) 2M x 36 |
|
64MB |
(2) 4M x 36 |
(2) 4M x 36 |
|
Note: The location of banks 0 & 1 are unidentified. | ||
|
CACHE CONFIGURATION | |||
|
Size |
Bank 0 |
Bank 1 |
TAG |
|
128KB |
(4) 32K x 8 |
None |
(2) 32K x 8 |
|
256KB |
(4) 32K x 8 |
(4) 32K x 8 |
(2) 32K x 8 |
|
Note: The location of banks 0 & 1 are unidentified. | |||
|
CACHE JUMPER CONFIGURATION | ||||
|
Size |
J4 |
J5 |
J6 |
J7 |
|
None |
Open |
Open |
Open |
Open |
|
128KB |
Pins 1 & 2 closed |
Pins 1 & 2 closed |
Pins 1 & 2 closed |
Pins 1 & 2 closed |
|
256KB |
Pins 2 & 3 closed |
Pins 2 & 3 closed |
Pins 2 & 3 closed |
Pins 2 & 3 closed |
|
CPU SPEED SELECTION | |||
|
Speed |
J1 |
J2 |
J3 |
|
25MHz |
Open |
Closed |
Closed |
|
33MHz |
Closed |
Open |
Closed |
|
40MHz |
Closed |
Open |
Open |
|
50iMHz |
Open |
Closed |
Closed |
|
50MHz |
Open |
Open |
Open |
|
66iMHz |
Closed |
Open |
Closed |
|
100iMHz |
Closed |
Open |
Closed |
|
CPU TYPE SELECTION | |
|
Type |
J35 |
|
SL80486SX |
Pins 2 & 3 closed |
|
SL80486DX |
Pins 2 & 3 closed |
|
SL80486DX2 |
Pins 2 & 3 closed |
|
SL80486DX4 |
Pins 2 & 3 closed |
|
P24T |
Pins 1 & 2 closed |
|
VL BUS WAIT STATE SELECTION | ||
|
Setting |
J28 | |
|
0 |
Pins 1 & 2 closed | |
|
1 |
Pins 2 & 3 closed | |