AMPTRON INTERNATIONAL, INC.
PM-7500C
|
Processor |
Pentium |
|
Processor Speed |
75/90/100/120/133MHz |
|
Chip Set |
Intel |
|
Video Chip Set |
None |
|
Maximum Onboard Memory |
128MB (EDO supported) |
|
Maximum Video Memory |
None |
|
Cache |
256/512KB |
|
BIOS |
Award |
|
Dimensions |
254mm x 218mm |
|
I/O Options |
32-bit PCI slots (3), floppy drive interface, IDE interfaces (2), parallel port, serial ports (2) |
|
NPU Options |
None |
|
CONNECTIONS | |||
|
Purpose |
Location |
Purpose |
Location |
|
Serial port 2 |
CN1 |
Chassis fan power |
J23 |
|
Serial port 1 |
CN2 |
Speaker |
JP25 |
|
Floppy drive interface |
CN3 |
Power LED & keylock |
JP26 |
|
Parallel port |
CN4 |
Reset switch |
JP27 |
|
IDE interface 2 |
CN5 |
IDE interface LED |
JP28 |
|
IDE interface 1 |
CN6 |
32-bit PCI slots |
PC1 PC3 |
|
External battery |
J4 | ||
|
USER CONFIGURABLE SETTINGS | |||
|
Function |
Label |
Position | |
|
|
CMOS memory normal operation |
J4 |
Pins 2 & 3 closed |
|
CMOS memory clear |
J4 |
Pins 3 & 4 closed | |
|
Battery type select external |
J4 |
Closed | |
|
Flash BIOS voltage select 12v |
JP4 |
Closed | |
|
Flash BIOS voltage select 5v |
JP4 |
Open | |
|
|
Factory configured - do not alter |
JP9 |
Unidentified |
|
|
Factory configured - do not alter |
JP10 |
Unidentified |
|
DRAM CONFIGURATION | ||
|
Size |
Bank 0 |
Bank 1 |
|
8MB |
(2) 1M x 36 |
None |
|
16MB |
(2) 2M x 36 |
None |
|
16MB |
(2) 1M x 36 |
(2) 1M x 36 |
|
24MB |
(2) 2M x 36 |
(2) 1M x 36 |
|
32MB |
(2) 4M x 36 |
None |
|
32MB |
(2) 2M x 36 |
(2) 2M x 36 |
|
40MB |
(2) 4M x 36 |
(2) 1M x 36 |
|
48MB |
(2) 4M x 36 |
(2) 2M x 36 |
|
64MB |
(2) 8M x 36 |
None |
|
64MB |
(2) 4M x 36 |
(2) 4M x 36 |
|
72MB |
(2) 8M x 36 |
(2) 1M x 36 |
|
80MB |
(2) 8M x 36 |
(2) 2M x 36 |
|
96MB |
(2) 8M x 36 |
(2) 4M x 36 |
|
128MB |
(2) 8M x 36 |
(2) 8M x 36 |
|
Note: Board accepts EDO memory. The location of the banks is unidentified. | ||
|
CACHE CONFIGURATION | ||
|
Size |
Bank 0 |
TAG |
|
256KB |
(8) 32K x 8 |
(1) 8K/16K/32K x 8 |
|
512KB |
(8) 64K x 8 |
(1) 16K/32K x 8 |
|
CACHE JUMPER CONFIGURATION | |
|
Size |
J9 |
|
256KB |
Pins 1 & 2 closed |
|
512KB |
Pins 2 & 3 closed |
|
CACHE VOLTAGE CONFIGURATION | |
|
Voltage |
J10 |
|
3.3v |
Pins 1 & 2 closed |
|
5v |
Pins 2 & 3 closed |
|
CPU SPEED SELECTION | |||||||
|
CPU speed |
Clock speed |
Multiplier |
JP3 |
JP5A |
JP5B |
JP11A |
JP11B |
|
75MHz |
50MHz |
1.5x |
1 & 2 |
Closed |
Closed |
Open |
Open |
|
90MHz |
60MHz |
1.5x |
2 & 3 |
Open |
Closed |
Open |
Open |
|
100MHz |
66MHz |
1.5x |
2 & 3 |
Closed |
Open |
Open |
Open |
|
120MHz |
60MHz |
2x |
2 & 3 |
Open |
Closed |
Closed |
Open |
|
133MHz |
66MHz |
2x |
2 & 3 |
Closed |
Open |
Closed |
Open |
|
Note: Pins designated should be in the closed position. The orientation of A & B on JP11 is unidentified. | |||||||
|
CPU VOLTAGE SELECTION | |
|
Voltage |
JP6 |
|
3.3v |
Pins 2 & 3 closed |
|
3.5v |
Pins 1 & 2 closed |
|
DMA CHANNEL SELECTION | ||
|
Channel |
JP1 |
JP2 |
|
1 |
Pins 1 & 2 closed |
Pins 1 & 2 closed |
|
2 |
Pins 2 & 3 closed |
Pins 2 & 3 closed |