SIGNATEC, INC.
DA500A
|
Card Type |
Video card |
|
Video Chip Set |
Unidentified |
|
Maximum Video Memory |
Unidentified |
|
Video Types Supported |
Unidentified |
|
Highest Resolution Supported |
Unidentified |
|
Data Bus |
16-bit ISA |
|
CONNECTIONS | |||
|
Function |
Label |
Function |
Label |
|
Signatec Auxiliary Bus (SAB) interface |
J1 |
Channel 2 |
J5 |
|
Signatec Auxiliary Bus (SAB) interface |
J2 |
Clock |
J6 |
|
Master - Slave connector |
J3 |
Trigger |
J7 |
|
Channel 1 |
J4 |
Memory expansion connector |
J8 |
|
USER CONFIGURABLE SETTINGS | |||
|
Function |
Label |
Position | |
|
MX5A not installed |
JP1 |
Pins 2 & 3 closed | |
|
MX5A installed |
JP1 |
Pins 1 & 2 closed | |
|
External clock termination to ground |
JP2 |
Pins 1 & 2 closed | |
|
External clock termination to 2V (ECL) |
JP2 |
Pins 2 & 3 closed | |
|
TTL level external trigger |
JP3 |
Pins 1 & 2 closed | |
|
Low level external trigger |
JP3 |
Pins 2 & 3 closed | |
|
TTL level external trigger |
JP4 |
Pins 1 & 2 closed | |
|
Low level external trigger |
JP4 |
Pins 2 & 3 closed | |
|
Connected for multiple MEM500 boards |
W6 |
Closed | |
|
Connected for multiple MEM500 boards |
W7 |
Closed | |
|
Connected for Ch1/Ch2 select bypass only |
W11 |
Open | |
|
Factory adjustment for RAM timing |
W13 |
Pins 1 & 2 closed | |
|
Factory adjustment for RAM timing |
W15 |
Pins 1 & 2 closed | |
|
MASTER/SLAVE BOARD SELECTION | |||||
|
Selection |
W1 |
W2 |
W3 |
W4 | |
|
Master |
Pins 2 & 3 closed |
Pins 1 & 2 closed |
Pins 2 & 3 closed |
Pins 1 & 2 closed | |
|
Slave |
Pins 2 & 3 closed |
Pins 1 & 2 closed |
Pins 1 & 2 closed |
Pins 2 & 3 closed | |
|
MASTER/SLAVE BOARD SELECTION (CON'T) | |||||
|
Selection |
W5 |
W8 |
W9 |
W10 | |
|
Master |
Closed |
Closed |
Closed |
Closed | |
|
Slave |
Open |
Open |
Open |
Open | |
|
MASTER/SLAVE BOARD SELECTION (CON'T) | ||||||
|
Selection |
W12 |
W14 |
W16 |
W19 |
W20 | |
|
Master |
Closed |
Pins 1 & 2 closed |
Closed |
Closed |
Open | |
|
Slave |
Open |
Pins 2 & 3 closed |
Open |
Open |
Closed | |
|
ANALOG BANDWIDTH SELECTION | ||||
|
Setting |
SW1/1 |
SW1/2 |
SW1/3 |
SW1/4 |
|
Maximum |
On |
Off |
Off |
Off |
|
100Mhz |
Off |
On |
On |
Off |
|
BASE I/O ADDRESS SELECTION | |||||||||
|
Setting |
SW3/1 |
SW3/2 |
SW3/3 |
SW3/4 |
SW3/5 |
SW3/6 |
SW3/7 |
SW3/8 | |
|
0h |
On |
On |
On |
On |
On |
On |
On |
On | |
|
4h |
Off |
On |
On |
On |
On |
On |
On |
On | |
|
8h |
On |
Off |
On |
On |
On |
On |
On |
On | |
|
Ch |
Off |
Off |
On |
On |
On |
On |
On |
On | |
|
10h |
On |
On |
Off |
On |
On |
On |
On |
On | |
|
300h |
On |
On |
On |
On |
On |
On |
Off |
Off | |
|
3Ech |
Off |
Off |
On |
Off |
Off |
Off |
Off |
Off | |
|
3F0h |
On |
On |
Off |
Off |
Off |
Off |
Off |
Off | |
|
3F4h |
Off |
On |
Off |
Off |
Off |
Off |
Off |
Off | |
|
3F8h |
On |
Off |
Off |
Off |
Off |
Off |
Off |
Off | |
|
3FCh |
Off |
Off |
Off |
Off |
Off |
Off |
Off |
Off | |
|
Note: A total of 255 base address settings are available. The switches are a binary representation of the decimal memory addresses. SW3/8 is the Most Significant Bit and switch SW3/1 is the Least Significant Bit. The switches have the following decimal values: SW3/8=512, SW3/7=256, SW3/6=128, SW3/5=64, SW3/4=32, SW3/3=16, SW3/2=8, SW3/1=4. Turn off the switches and add the values of the switches to obtain the correct memory address. (Off=1, On=0) | |||||||||