ACQUTEK CORPORATION
PA-AD12(-H)
|
Card Type |
Data Acquisition |
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Chip Set |
None |
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Maximum Onboard Memory |
Unidentified |
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I/O Options |
Analog/digital I/O |
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Data Bus |
16-bit ISA |
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Card Size |
Half-length |
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CONNECTIONS |
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Function |
Label |
Function |
Label |
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37-pin analog/digital signals connector |
CN1 |
A/D converter offset selector |
VR1 |
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Timer signal input (8254) |
JP1 |
A/D converter range selector |
VR2 |
|
External clock input |
JP10 |
A/D converter CMRR selector |
VR3 |
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USER CONFIGURABLE SETTINGS |
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Function |
Label |
Position |
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Differential A/D input |
JP9 |
Pins 1 & 2, 4 & 5 closed |
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Single ended A/D input |
JP9 |
Pins 2 & 3, 5 & 6 closed |
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TESTING JUMPER SETTINGS |
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Function |
Label |
Position |
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|
Factory configured - do not alter |
JP2 |
Pins 1 & 2, 3 & 4 closed |
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Factory configured - do not alter (S/H enabled) |
TP1 |
Pins 1 & 2 closed |
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Factory configured - do not alter |
TP2 |
Pins 1 & 2 closed |
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Factory configured - do not alter |
TP3 |
Pins 1 & 2 closed |
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Factory configured - do not alter |
TP4 |
Pins 1 & 2 closed |
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Factory configured - do not alter |
TP5 |
Pins 1 & 2 closed |
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A/D INPUT VOLTAGE RANGE SELECTION |
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Function |
Label |
Position |
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5V A/D input |
JP5 |
Pins 2 & 3 closed |
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10V A/D input |
JP5 |
Pins 1 & 2 closed |
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Bipolar A/D input |
JP6 |
Pins 1 & 2, 4 & 5 closed |
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Unipolar A/D input |
JP6 |
Pins 2 & 3, 5 & 6 closed |
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A/D INPUT GAIN SELECTION |
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Gain |
JP8 |
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Not installed |
Open |
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1 |
Pins 9 & 11 closed |
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2 |
Pins 11 & 12 closed |
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5 |
Pins 9 & 10 closed |
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10 |
Pins 7 & 8 closed |
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20 |
Pins 5 & 6 closed |
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50 |
Pins 3 & 4 closed |
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User defined |
Pins 1 & 2 closed |
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BASE I/O ADDRESS SELECTION |
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|
Setting |
JP7/A |
JP7/B |
JP7/C |
JP7/D |
JP7/E |
JP7/F |
JP7/G |
JP7/H |
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|
000h |
Closed |
Closed |
Closed |
Closed |
Closed |
Closed |
Closed |
Closed |
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|
010h |
Closed |
Closed |
Closed |
Closed |
Closed |
Closed |
Closed |
Open |
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|
020h |
Closed |
Closed |
Closed |
Closed |
Closed |
Closed |
Open |
Closed |
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030h |
Closed |
Closed |
Closed |
Closed |
Closed |
Closed |
Open |
Open |
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|
040h |
Closed |
Closed |
Closed |
Closed |
Closed |
Open |
Closed |
Closed |
|
2E0h |
Closed |
Closed |
Open |
Closed |
Open |
Open |
Open |
Closed |
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|
FB0h |
Open |
Open |
Open |
Open |
Open |
Closed |
Open |
Open |
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|
FC0h |
Open |
Open |
Open |
Open |
Open |
Open |
Closed |
Closed |
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|
FD0h |
Open |
Open |
Open |
Open |
Open |
Open |
Closed |
Open |
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|
FE0h |
Open |
Open |
Open |
Open |
Open |
Open |
Open |
Closed |
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|
FF0h |
Open |
Open |
Open |
Open |
Open |
Open |
Open |
Open |
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Note: A total of 256 base address settings are available. The jumpers are a binary representation of the decimal memory addresses. JP7/A is the Most Significant Bit and switch JP7/H is the Least Significant Bit. The switches have the following decimal values: JP7/A=2048, JP7/B=1024, JP7/C=512, JP7/D=256, JP7/E=128, JP7/F=64, JP7/G=32, JP7/H=16. Turn off the switches and add the values of the switches to obtain the correct memory address. (Open=1, Closed=0) |
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IRQ INTERRUPT SELECTION |
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IRQ |
JP3/A |
JP3/B |
JP3/C |
JP3/D |
JP3/E |
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IRQ2 |
Open |
Open |
Open |
Open |
Pins 1 & 2 |
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IRQ3 |
Open |
Open |
Open |
Pins 1 & 2 |
Open |
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IRQ4 |
Open |
Open |
Pins 1 & 2 |
Open |
Open |
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IRQ5 |
Open |
Pins 1 & 2 |
Open |
Open |
Open |
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IRQ7 |
Pins 1 & 2 |
Open |
Open |
Open |
Open |
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IRQ10 |
Open |
Open |
Open |
Open |
Pins 2& 3 |
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IRQ11 |
Open |
Open |
Open |
Pins 2& 3 |
Open |
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IRQ12 |
Open |
Open |
Pins 2& 3 |
Open |
Open |
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IRQ14 |
Open |
Pins 2 & 3 |
Open |
Open |
Open |
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IRQ15 |
Pins 2 & 3 |
Open |
Open |
Open |
Open |
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Disabled |
Open |
Open |
Open |
Open |
Open |
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Note: JP3 jumper may be labeled JP3/4 on the board. Pins designated are in the closed position. IRQ10, IRQ11, IRQ12, IRQ14 & IRQ15 are for AT compatible buses; PC buses will not support them. |
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