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386WB Cache (Version II)

J-MARK COMPUTER CORPORATION

386WB Cache (Version II)

Processor

80386DX

Processor Speed

33/40MHz

Chip Set

OPTI

Max. Onboard DRAM

32MB

Cache

32/64/128/256KB

BIOS

AMI

Dimensions

330mm x 218mm

I/O Options

None

NPU Options

80387/3167

CONNECTIONS

Purpose

Location

Purpose

Location

External battery

J10

Turbo LED

JP4

Power LED & keylock

J23

Reset switch

JP11

Speaker

J24

Turbo switch

SW2

USER CONFIGURABLE SETTINGS

Function

Jumper

Position

Monitor type select color

JP1

Closed

 

Monitor type select monochrome

JP1

Open

CMOS memory normal operation

JP2

pins 2 & 3 closed

 

CMOS memory clear

JP2

pins 1 & 2 closed

Factory configured - do not alter

JP3

Closed

DRAM CONFIGURATION

Size

Bank 0

Bank 1

1MB

(4) 256K x 9

NONE

2MB

(4) 256K x 9

(4) 256K x 9

4MB

(4) 1M x 9

NONE

8MB

(4) 1M x 9

(4) 1M x 9

16MB

(4) 4M x 9

NONE

32MB

(4) 4M x 9

(4) 4M x 9

CACHE CONFIGURATION

Size

Bank 0

Bank 1

TAG

32KB

(4) 8K x 8

NONE

(1) 8K x 8

64KB

(4) 8K x 8

(4) 8K x 8

(1) 8K x 8

128KB

(4) 32K x 8

NONE

(1) 32K x 8

256KB

(4) 32K x 8

(4) 32K x 8

(1) 32K x 8

CACHE JUMPER CONFIGURATION

Size

JP5

JP6

JP7

JP8

JP9

JP10

32KB

1 & 2

Open

1 & 2

Open

1 & 2

2 & 3

64KB

2 & 3

Open

1 & 2

Open

1 & 2

1 & 2

128KB

2 & 3

Open

2 & 3

Closed

1 & 2

1 & 2

256KB

2 & 3

Closed

2 & 3

Closed

2 & 3

1 & 2

Note:Pins designated should be in the closed position.